Waveguide-coupled vertical cavity laser

ABSTRACT

An integrated circuit includes an optical source that provides an optical signal to an optical waveguide. In particular, the optical source may be implemented by fusion-bonding a III-V semiconductor to a semiconductor layer in the integrated circuit. In conjunction with surrounding mirrors (at least one of which is other than a distributed Bragg reflector), this structure may provide a cavity with suitable optical gain at a wavelength in the optical signal along a vertical direction that is perpendicular to a plane of the semiconductor layer. For example, the optical source may include a vertical-cavity surface-emitting laser (VCSEL). Moreover, the optical waveguide, defined in the semiconductor layer, may be separated from the optical source by a horizontal gap in the plane of the semiconductor layer. During operation of the optical source, the optical signal may be optically coupled across the gap from the optical source to the optical waveguide.

RELATED CASE

This application is a divisional application of, and hereby claimspriority under 35 U.S.C. §120 to, pending U.S. patent application Ser.No. 13/764,223, entitled “Waveguide-Coupled Vertical Cavity Laser,” byinventors Ashok V. Krishnamoorthy, John E. Cunningham, and Xuezhe Zheng,which was filed on 11 Feb. 2013, and which is hereby incorporated byreference.

GOVERNMENT LICENSE RIGHTS

This invention was made with Government support under Agreement No.HR0011-08-9-0001 awarded by DARPA. The Government has certain rights inthe invention.

BACKGROUND

1. Field

The present disclosure relates to techniques for communicating opticalsignals. More specifically, the present disclosure relates to anintegrated circuit that includes an optical source.

2. Related Art

Silicon photonics is a promising technology that can provide largecommunication bandwidth, low latency and low power consumption forinter-chip and intra-chip connections. In the last few years,significant progress has been made in developing low-cost components foruse in inter-chip and intra-chip silicon-photonic connections,including: high-bandwidth efficient silicon modulators, low-loss opticalwaveguides, wavelength-division-multiplexing (WDM) components, andhigh-speed CMOS optical-waveguide photodetectors. However, producing asuitable low-cost WDM optical source remains a challenge and poses anobstacle to implementing WDM silicon-photonic links. For example,conventional WDM laser sources: have very low wall-plug efficiency(typically, 1-5%), require cooling, and are bulky and expensive.

Hence, what is needed is an integrated optical source without theabove-described problems.

SUMMARY

One embodiment of the present disclosure provides an integrated circuitthat includes an optical source which provides an optical signal havinga wavelength. This optical source includes: a semiconductor layer with aregion having a top surface and a bottom surface; a material having atop surface and a bottom surface, where the bottom surface of thematerial is disposed on the top surface of the region, and the materialhas an optical gain at the wavelength that is larger than that of thesemiconductor layer; a first mirror, which is other than a reflectorthat includes multiple layers with alternating indices of refraction,disposed under the bottom surface of the region; and a second mirrordisposed on the top surface of the material, where the first mirror, thesecond mirror, the region and the material define an optical cavity outof a plane of the semiconductor layer. Moreover, the integrated circuitincludes an optical waveguide defined in the semiconductor layer.

For example, the semiconductor layer may include silicon. Moreover, thematerial may include a III-V semiconductor, such as indium-phosphide.This material may be fusion-bonded to the semiconductor layer.

Note that a given mirror, which can be the first mirror or the secondmirror, may include a stack, out of the plane of the semiconductorlayer, of alternating materials having a first index of refraction and asecond index of refraction that is higher than the first index ofrefraction. Furthermore, the first mirror and the second mirror may eachhave a reflectivity at the wavelength in excess of 99%.

Additionally, the optical source may include a vertical-cavitysurface-emitting laser (VCSEL).

In some embodiments, the material includes regions with dopantsproximate to edges of the material in the plane of the semiconductorlayer that define a current aperture for charge carriers in the opticalsource out of the plane of the semiconductor layer. Moreover, theintegrated circuit may include intra-optical-cavity electrical contactswhich conduct charge carriers that provide a current out of the plane ofthe semiconductor layer in the optical source. Additionally, theintegrated circuit may include a layer of another material between thetop surface of the region and the bottom surface of the material, where,during operation of the optical source, the other material restrictscurrent out of the plane of the semiconductor layer from thesemiconductor layer to the material. For example, the other material mayinclude n-type indium-phosphide.

Furthermore, the integrated circuit may include: a semiconductorsubstrate, and a buried-oxide layer having a bottom surface and a topsurface, where the bottom surface of the buried-oxide layer is disposedon top of the semiconductor substrate, and the bottom surface of thesemiconductor layer is disposed on the top surface of the buried-oxidelayer. Additionally, the semiconductor substrate may have been removedunder the region so that the first mirror is disposed on the bottomsurface of the buried-oxide layer. Note that the semiconductorsubstrate, the buried-oxide layer and the semiconductor layer mayconstitute a silicon-on-insulator technology.

In some embodiments, the integrated circuit includes a heater, definedin the semiconductor layer, which thermally tunes the wavelength of theoptical source.

Moreover, the integrated circuit may include a diffraction grating,defined in the region, which optically couples the optical signal in theplane of the semiconductor layer to the optical waveguide. Thisdiffraction grating may include an electro-optic material thatelectrically tunes the wavelength of the optical source.

Note that the optical waveguide may be separated by a gap in the planeof the semiconductor layer that is defined by an edge of the region andan edge of the optical waveguide. Therefore, the optical waveguide mayreceive the optical signal from the optical source via optical couplingacross the gap. Moreover, the edge of the optical waveguide may beproximate to the edge of the region so that, during operation of theoptical source, the optical signal is evanescently coupled to theoptical waveguide.

Another embodiment provides a system that includes the integratedcircuit.

Another embodiment provides a method for providing the optical signalhaving the wavelength, which may be performed by the integrated circuit.During operation of the integrated circuit, charge carriers are injectedinto the optical source in the integrated circuit, where the opticalsource includes the optical cavity out of the plane of the semiconductorlayer in the integrated circuit, and where the optical cavity includes:the region in the semiconductor layer, the material disposed on the topsurface of the region having the optical gain at the wavelength that islarger than that of the semiconductor layer, and mirrors below thesemiconductor layer and above the material (where at least one of themirrors is other than a reflector that includes multiple layers withalternating indices of refraction). Then, the optical signal produced inthe optical source is optically coupled to the optical waveguide,defined in the semiconductor layer, which is separated by the gap in theplane of the semiconductor layer that is defined by the edge of theregion and the edge of the optical waveguide.

BRIEF DESCRIPTION OF THE FIGURES

FIG. 1 is a block diagram of a side view of an integrated circuit inaccordance with an embodiment of the present disclosure.

FIG. 2 is a block diagram of a side view of an integrated circuit inaccordance with an embodiment of the present disclosure.

FIG. 3 is a block diagram of a top view of an integrated circuit inaccordance with an embodiment of the present disclosure.

FIG. 4 is a block diagram illustrating a system that includes anintegrated circuit in accordance with an embodiment of the presentdisclosure.

FIG. 5 is a flow chart illustrating a method for providing an opticalsignal in accordance with an embodiment of the present disclosure.

Note that like reference numerals refer to corresponding partsthroughout the drawings. Moreover, multiple instances of the same partare designated by a common prefix separated from an instance number by adash.

DETAILED DESCRIPTION

Embodiments of an integrated circuit, a system that includes theintegrated circuit, and a technique for providing an optical signal aredescribed. The integrated circuit includes an optical source thatprovides the optical signal to an optical waveguide. In particular, theoptical source may be implemented by fusion-bonding a III-Vsemiconductor to a semiconductor layer in the integrated circuit. Inconjunction with surrounding mirrors (at least one of which is otherthan a distributed Bragg reflector and, more generally, a reflector thatincludes multiple layers with alternating indices of refraction), thisstructure may provide a cavity with suitable optical gain at awavelength in the optical signal along a vertical direction that isperpendicular to a plane of the semiconductor layer. For example, theoptical source may include a vertical-cavity surface-emitting laser(VCSEL). Moreover, the optical waveguide, defined in the semiconductorlayer, may be separated from the optical source by a horizontal gap inthe plane of the semiconductor layer. During operation of the opticalsource, the optical signal may be optically coupled across the gap fromthe optical source to the optical waveguide.

By combining the optical source and the optical waveguide, theintegrated circuit may provide a low-cost, compact, energy-efficient WDMoptical source for use in inter-chip and intra-chip connections, such asWDM silicon-photonic links. Consequently, the optical source may helpfacilitate high-speed inter- and intra-chip silicon-photonicinterconnects, as well as associated systems that can include thiscomponent (such as high-performance computing systems).

We now describe embodiments of the integrated circuit. Theelectrical-to-optical conversion efficiency of a WDM optical source is amajor contributor to the energy efficiency of a silicon-photonic link.For example, if a silicon-photonic link uses a minimum of 2 mW of inputlight (before an optical modulator), and the electrical-to-opticalconversion efficiency is 10% (which is optimistic relative to the 1-5%electrical-to-optical conversion efficiency of many existing opticalsources), then 20 mW of electrical power will be needed just to createthe required input light (i.e., not including the power consumed by theremainder of the silicon-photonic link). This power consumption can bereduced by improving the conversion efficiency of the optical source andby decreasing the optical losses that occur when light is input to thesilicon-photonic link. The former approach is described below.

FIG. 1 presents a block diagram of a side view of integrated circuit 100that includes an electrically injected semiconductor laser device, suchas optical source 110, which provides an optical signal having awavelength λ (such as a fundamental wavelength or a carrier wavelength).This optical source includes: a semiconductor layer 112 (such assilicon) with a region 114 having a surface 116 and a surface 118; amaterial 120 having a surface 122 and a surface 124, where surface 124of material 120 is disposed on surface 116, and material 120 has anoptical gain at λ that is larger than that of semiconductor layer 112; amirror 126 disposed under surface 118; and a mirror 128 disposed onsurface 122. Note that material 120 may include a III-V semiconductor,such as indium-phosphide. This material may be fusion-bonded orhybrid-bonded to semiconductor layer 112 (for example, using an oxide,such as silicon dioxide, or a hydrophobic bond) because growth of thegain medium directly on silicon may be difficult due to latticemismatch. Alternatively, material 120 may include germanium that isdirectly grown in silicon, and doping and/or stress layers may be usedto create a direct bandgap material. Moreover, mirror 126, mirror 128,region 114 and material 120 may define an optical cavity 130 out of aplane 132 of semiconductor layer 112. For example, optical source 110may include a vertical-cavity surface-emitting laser (VCSEL).

Note that a given mirror, which can be mirror 126 or mirror 128, mayinclude a stack (such as one of stacks 134), out of plane 132, ofalternating materials having a first index of refraction and a secondindex of refraction that is higher than the first index of refraction.For example, mirrors 126 and 128 may include a dielectric stack withalternating layers of zinc selenide and silicon dioxide, which may eachbe 100-500 nm thick. For mirror 128, these layers may be epitaxiallydeposited on indium-phosphide. In some embodiments, mirrors 126 and 128include a distributed Bragg reflector or a high-contrast gratingimplemented in indium-phosphide. Furthermore, mirrors 126 and 128 mayeach have a reflectivity at λ in excess of 99%, such as 99.9%.

Additionally, integrated circuit 100 includes an optical waveguide 136(such as a ridge type or a wire type of optical waveguide), defined insemiconductor layer 112, which is separated by an optional gap 138 inplane 132 that is defined by an edge 140-1 of region 114 and an edge 142of optical waveguide 136, where optical waveguide 136 receives theoptical signal from optical source 110 via optical coupling acrossoptional gap 138. For example, edge 142 may be proximate to edge 140-1so that, during operation of optical source 110, the optical signal isevanescently coupled to optical waveguide 136. Therefore, the primaryoutput coupler for optical source 110 may be optical waveguide 136 (asopposed to via surface emission). This structure is sometimes referredto as a ‘waveguide-coupled vertical-cavity laser’ or ‘waveguide-coupledVCSEL.’

Note that the length of optical cavity 130 may be tuned (for example, bystopping etching on atomic layer using an etch stop) for correctemission and so that the optical waveguide 136 is proximate to a node(with high-intensity) in the optical standing wave within optical cavity130. Furthermore, optional gap 138 may have a width so that the opticalcoupling to optical source 110 is approximately 1%. For example,optional gap 138 may be less than 100 nm (such as 50 nm).

In an exemplary embodiment, optical source 110 has a wall-plugefficiency (defined as the ratio of the output light power to the inputelectrical power) of at least 10-20% at λ of 1550 nm. This is asignificant improvement relative to existing WDM optical sources for usein silicon photonics.

In some embodiments, material 120 includes regions 144 with implanteddopants (such as aluminum or hydrogen) and/or an oxide(s) proximate toedges 140 in plane 132 that define a current (or electrical) aperturefor charge carriers in optical source 110 out of plane 132. This currentaperture may increase the current density, and may control the currentflow so as to maximally overlap the charge carriers with the opticalfield, thereby improving the efficiency of the electrical-to-opticalconversion. For example, the current aperture may have a width of 5-10μm, while optical cavity 130 may have a width of 10-50 μm.

Because optical source 110 typically is electrically driven, electricalcontacts may be defined on the p and n sides. This is shown in FIG. 2,which presents a block diagram of a side view of integrated circuit 200.In particular, intra-optical-cavity electrical contacts 210 may conductcharge carriers that provide a current out of plane 132 in opticalsource 110. These electrical contacts may facilitate direct access tothe gain medium in material 120, without having to travel throughmirrors 126 and 128. In addition, the use of intra-optical-cavityelectrical contacts 210 for both the p and n sides of optical source 110may simplify the construction and may allow the broadest range ofmaterials to be used for mirrors 126 and 128 (including depositeddielectric mirrors that may not be doped for improved conductivity).Note that, in integrated circuit 200, optional gap 138 may be filledwith silicon dioxide.

While material 120 may be fusion-bonded to semiconductor layer 112 usingsilicon dioxide, in other embodiments integrated circuit 200 includes alayer 212 of another material between surfaces 116 and 124 and/or alayer 214 of the other material on top of surface 122. During operationof optical source 110, the other material may restrict current out ofplane 132 from semiconductor layer 112 to material 120. For example, theother material may include n-type indium-phosphide. Thus, the currentmay be confined to material 120, while optical cavity 130 may includematerial 120, layer 212, layer 214, and semiconductor layer 112. Thus,layer 212 may decouple the electrical and optical portions of opticalsource 110.

Referring back to FIG. 1, in some embodiments integrated circuit 100 isimplemented entirely in a III-V semiconductor material. In this case,mirrors 126 and 128: may be grown epitaxially, may be deposited, or mayinclude a high-contrast grating. Alternatively, as shown in FIG. 1, insome embodiments integrated circuit 100 includes: a semiconductorsubstrate 146 (such as silicon), and a buried-oxide layer 148 (such assilicon dioxide) having a surface 150 and a surface 152, where surface152 is disposed on top of semiconductor substrate 146, and surface 118is disposed on surface 150. Additionally, as shown in FIG. 1,semiconductor substrate 146 may have been removed under region 114 sothat mirror 126 is disposed on surface 152 in a back-side etch pit. Notethat semiconductor substrate 146, buried-oxide layer 148 andsemiconductor layer 112 may constitute a silicon-on-insulatortechnology. In some embodiments, the silicon in semiconductor layer 112has a thickness of λ/2 (for example, a thickness of 0.775 μm),buried-oxide layer 148 has a thickness of λ/4 (such as approximately 0.4μm), and optical cavity 130 may have a total length of 2λ (for example,3.1 μm).

The ability to integrate optical source 110 with optical waveguide 136using silicon-on-insulator technology may allow wavelength-filteringelements or components to be defined in optical waveguide 136 using:vertically etched gratings, horizontally etched gratings (e.g., acorrugated-grating bus optical waveguide), and/or ring resonators. Thesecomponents can be used to achieve wavelength selectivity in the outputoptical signal. This may effectively narrow the range of acceptablelasing wavelengths by having an output coupler that iswavelength-dependent and controllable in silicon. Therefore, thistechnique may combine a wavelength-selective laser (such as a laser witha distributed Bragg reflector or a distributed feed-back laser) with theefficiency and ease of fabrication of a VCSEL.

Note that, in order to allow wafer testing of optical source 110,mirrors 126 and/or 128 may be tuned to emit a very small amount of lightvia surface-normal emission. For example, a mirror with 99.9%reflectivity would allow some light to escape through the surface tofacilitate wafer-scale testing of the devices before dicing the waferand to monitor the emission during operation to determine andcontinuously assess the health of optical source 110.

The particular λ of emission from optical source 110 (such as a laser)is a function of its junction temperature. Even though the gain medium(i.e., material 120), the resonator geometry (i.e., optical cavity 130)and the grating-based bus waveguide output coupler (i.e., opticalwaveguide 136) can all be used to help set λ, this selected λ may stillbe subject to thermal drift. Thus, the specific emission λ from opticalsource 110 may fluctuate depending on the temperature of integratedcircuit 100. However, by controlling the temperature of the laser andthe silicon waveguide/wavelength filter that couples out the light, λcan be controlled. Therefore, in some embodiments, integrated circuit100 includes an optional heater 154, defined in semiconductor layer 112,which thermally tunes λ of optical source 110. For example, optionalcontrol logic 156 (which may be a circuit implemented in silicon) mayadjust optional heater 154 in a wavelength-based feedback loop. Tofacilitate feedback control, integrated circuit 100 may include anoptional wavelength sensor (not shown) or an interface (not shown) whichreceives information from an optional external wavelength sensor.

Note that temperature-based tuning of multiple waveguide-coupledvertical-cavity lasers may allow a dense array of single λ opticalsignals to be provided for WDM applications with localized thermalcontrol of the individual λs. In this way, the λs can be stabilizedduring operation of the waveguide-coupled vertical-cavity lasers. Forexample, the heaters may be used to adjust the temperatures of theoptical sources and/or their associated optical waveguides to maintaintargeted temperature differences (or temperature gradients) and, thus,targeted wavelength differences (or wavelength spacings) between theoutput-coupled λs in the array. This temperature-based tuning may allowcorrections to be applied for chip-level or environmental temperatureperturbations. In some embodiments, optional heater 154 may be used toadjust the temperature of a spare waveguide-coupled vertical-cavitylaser to tune λ to be that of a failed laser in an array. Anotherapplication of this thermal-tuning technique is one-bit-per-wavelengthencoding.

In certain operating conditions, the absolute wavelength range of anarray of waveguide-coupled vertical-cavity lasers may experience drift.For example, this can occur if the ambient temperature changes or ifthere is a global change in the temperature of the chip substrate. Inthis situation, active thermal management of λ can still produce andmaintain a correct wavelength spacing between the λs as long as the chipdoes not experience thermal runaway, and as long as the temperaturedependence of the laser λs remains in the linear region. In someembodiments, thermal runaway can be mitigated if active cooling (notshown) is used to control and maintain the temperature of the chipsubstrate.

In order to horizontally couple the optical signal from optical source110 to optical waveguide 136, a diffraction grating may be included inoptical cavity 130. This is shown in FIG. 3, which presents a blockdiagram of a top view of integrated circuit 300. In particular, adiffraction grating 310 may be defined in region 114 (FIG. 1), forexample, using periodic angular slots in semiconductor layer 112. Thisdiffraction grating may include an optional electro-optic material (suchas in the angular slots) that can be used to electrically tune λ of theoptical source in integrated circuit 300. In some embodiments,diffraction grating 310 has a wide of 300-500 nm.

In an exemplary embodiment, optical waveguide 136 may be a semi-circularoptical waveguide or an annular ring around the node of the optical modein optical source 130. This configuration may leverage the azimuthalsymmetry in cylindrical coordinates of optical source 130 even though itmay be single mode. In particular, by including a sub-wavelengthdiffraction grating on the circumference of a silicon disk in opticalsource 110 (FIG. 1), the vertical mode may be perturbed and opticalcoupled to optical waveguide 136 or an annular circular output couplerin the horizontal plane. This grating perturbation may overcome theorthogonal momentum vectors to optically couple the optical signal tooptical waveguide 136.

In an exemplary embodiment, the optical source addresses challengesassociated with VCSELs at long wavelengths (e.g. 1.55 μm or C-band),including the non-availability of good-quality, (>99%) high-reflectivitymirrors that are needed to create a short-length vertical cavity lasers.In particular, while epitaxial mirrors at such long wavelengths areoften hard to produce, typically at least one of the mirrors for anylong-wavelength structure needs to be epitaxial. Furthermore, even ifsuch a VCSEL can be produced, the coupling of the light into asilicon-on-insulator optical waveguide is usually not straightforward.For example, a grating coupler typically cannot efficiently acceptsurface-normal light into an optical waveguide. Therefore, the VCSEL isusually tilted at a specific angle which is difficult to package andmanufacture at low-cost. In addition, edge coupling of light from aVCSEL into an optical waveguide is often difficult (lossy) forsub-micron optical waveguides, and is also not straightforward tomanufacture at low-cost.

The optical source addresses these problems by providing a structure inwhich a vertical-cavity laser is directly edge coupled into an opticalwaveguide. In this structure, the bottom mirror of the optical sourcemay be below the buried-oxide layer. This buried-oxide layer typicallyhas a precise thickness and the silicon above the buried-oxide layer mayalso be precisely controlled to an accuracy of a few percent (e.g., for250-nm thick silicon-on-insulator provides a precision level of 10 nm,which is sufficient given the wavelength of light of 1550 nm).Additional details on wafer and silicon-on-insulator thicknessvariations and statistics are in A. V. Krishnamoorthy et al.,“Exploiting CMOS manufacturing to reduce tuning requirements forresonant optical devices,” IEEE Photonics Journal, Vol. 3, No. 3, pp.567-579, June 2011, the contents of which are hereby incorporated byreference. Note that the thickness of the wafer is typically notcontrolled to this level of accuracy. However, as is known in the art,the buried-oxide layer (typically, silicon dioxide) forms a good etchstop for a chemical etch of the substrate. Therefore, the thicknessaccuracy of the silicon-on-insulator and the buried-oxide layer can beused to help define the optical cavity, and the backside of the siliconsubstrate can be removed to expose the buried-oxide layer. Once theburied-oxide layer is exposed, a high-reflectivity mirror (e.g., metalmirror) can be deposited directly on the back side of the substrateunderneath the buried-oxide layer.

The top mirror can be formed epitaxially together with the gain material(this may be a half-laser gain material). This fabrication approach maybe easier than growing the full VCSEL structure with two epitaxial Braggmirrors. However, in an exemplary embodiment, a semiconductor gainmaterial (e.g., a III-V gain material such as InP, or a Group IV gainmaterial such as doped, strained Ge) may be used and a mirror may bedeposited on top of the gain material for the top mirror (along with themetal bottom mirror) so that no epitaxial Bragg mirrors (or distributedBragg reflectors), and more generally reflectors that include multiplelayers with alternating indices of refraction, need to be grown. Forexample, the deposited mirror may be a dielectric mirror or acombination of a dielectric mirror followed by a metal ‘cap; to ensurevery high reflectivity. Note that such a dielectric mirror may also bemuch thinner than an epitaxial Bragg mirror (i.e., it may need far fewerpairs). This may provide a packaging advantage because the resultingtopology of the optical source is reduced (i.e., flatter).

In an alternate embodiment, a dielectric mirror (with or without metal)can be used for both top mirror (above the gain material) and the bottommirror (beneath the buried-oxide layer). These types of dielectricmirrors are known in the art.

One or more of the preceding embodiments of the integrated circuit maybe included in a system and/or an electronic device. FIG. 4 presents ablock diagram illustrating a system 400 that includes an integratedcircuit 410.

In general, functions of integrated circuit 100 (FIG. 1), integratedcircuit 200 (FIG. 2), integrated circuit 300 (FIG. 3) and system 400 maybe implemented in hardware and/or in software. Thus, system 400 mayinclude one or more program modules or sets of instructions stored in anoptional memory subsystem 412 (such as DRAM or another type of volatileor non-volatile computer-readable memory), which may be executed by anoptional processing subsystem 414. Note that the one or more computerprograms may constitute a computer-program mechanism. Furthermore,instructions in the various modules in optional memory subsystem 412 maybe implemented in: a high-level procedural language, an object-orientedprogramming language, and/or in an assembly or machine language. Notethat the programming language may be compiled or interpreted, e.g.,configurable or configured, to be executed by the processing subsystem.

Components in system 400 may be coupled by signal lines, links or buses.These connections may include electrical, optical, or electro-opticalcommunication of signals and/or data. Furthermore, in the precedingembodiments, some components are shown directly connected to oneanother, while others are shown connected via intermediate components.In each instance, the method of interconnection, or ‘coupling,’establishes some desired communication between two or more circuitnodes, or terminals. Such coupling may often be accomplished using anumber of circuit configurations, as will be understood by those ofskill in the art; for example, AC coupling and/or DC coupling may beused.

In some embodiments, functionality in these circuits, components anddevices may be implemented in one or more: application-specificintegrated circuits (ASICs), field-programmable gate arrays (FPGAs),and/or one or more digital signal processors (DSPs). Furthermore,functionality in the preceding embodiments may be implemented more inhardware and less in software, or less in hardware and more in software,as is known in the art. In general, system 400 may be at one location ormay be distributed over multiple, geographically dispersed locations.

System 400 may include one of a variety of devices that can include anintegrated circuit, including: a VLSI circuit, a switch, a hub, abridge, a router, a communication device or system (such as WDMcommunication system), a storage area network, a data center, a network(such as a local area network), a computer system (such as amultiple-core processor computer system), a desktop or personalcomputer, a server (such as a multi-socket, multi-rack server), a workstation, a mainframe computer, a blade, an enterprise computer, asupercomputer, a network-attached-storage (NAS) system, astorage-area-network (SAN) system, a laptop computer, a media player(such as an MP3 player), an appliance, a subnotebook/netbook, a tabletcomputer, a smartphone, a cellular telephone, a network appliance, aset-top box, a personal digital assistant (PDA), a toy, a controller, adigital signal processor, a game console, a device controller, acomputational engine within an appliance, a consumer-electronic device,a portable computing device or a portable electronic device, a personalorganizer, and/or another electronic device.

The preceding embodiments may include fewer components or additionalcomponents. For example, in FIG. 1 semiconductor layer 112 may includepoly-silicon or amorphous silicon and/or semiconductor substrate 146 mayinclude multiple substrates in a multi-chip module (such as a multi-chipmodule in which alternating facing chips that include routing and bridgelayers are coupled using optical proximity communication). Furthermore,a wide variety of fabrication techniques may be used to fabricate theoptical source in the preceding embodiments of the integrated circuit,as is known to one of skill in the art. In addition, a wide variety ofoptical components may be used in or in conjunction with the opticalsource. While thermal tuning of optical source 110 (FIG. 1) was used asan illustrative example, in other embodiments carrier-based indexmodulation may be used in conjunction with or instead of thermal tuning.

Although these embodiments are illustrated as having a number ofdiscrete items, the embodiments of the integrated circuit and the systemare intended to be functional descriptions of the various features thatmay be present rather than structural schematics of the embodimentsdescribed herein. Consequently, in these embodiments two or morecomponents may be combined into a single component, and/or a position ofone or more components may be changed.

While the preceding embodiments illustrate the use of the optical sourcein the integrated circuit in conjunction with an optical link, theoptical source may be used in applications other than communications,such as: manufacturing (cutting or welding), a lithographic process,data storage (such as an optical-storage device or system), medicine(such as a diagnostic technique or surgery), a barcode scanner,entertainment (a laser light show), and/or metrology (such as precisionmeasurements of distance).

In the preceding description, we refer to ‘some embodiments.’ Note that‘some embodiments’ describes a subset of all of the possibleembodiments, but does not always specify the same subset of embodiments.

We now describe embodiments of the method. FIG. 5 presents a flow chartillustrating a method 500 for providing an optical signal having awavelength, which may be performed using one of the embodiments of theintegrated circuit. During operation of the integrated circuit, chargecarriers are injected into the optical source in the integrated circuit(operation 510), where the optical source includes the optical cavityout of the plane of the semiconductor layer in the integrated circuit,and where the optical cavity includes: the region in the semiconductorlayer, the material disposed on the top surface of the region having theoptical gain at the wavelength that is larger than that of thesemiconductor layer, and mirrors below the semiconductor layer and abovethe material (wherein at least one of the mirrors is other than adistributed Bragg reflector and, more generally, a reflector thatincludes multiple layers with alternating indices of refraction). Then,the optical signal produced in the optical source is optically coupledto the optical waveguide (operation 512) defined in the semiconductorlayer.

In some embodiments of method 500, there may be additional or feweroperations. Moreover, the order of the operations may be changed, and/ortwo or more operations may be combined into a single operation.

The foregoing description is intended to enable any person skilled inthe art to make and use the disclosure, and is provided in the contextof a particular application and its requirements. Moreover, theforegoing descriptions of embodiments of the present disclosure havebeen presented for purposes of illustration and description only. Theyare not intended to be exhaustive or to limit the present disclosure tothe forms disclosed. Accordingly, many modifications and variations willbe apparent to practitioners skilled in the art, and the generalprinciples defined herein may be applied to other embodiments andapplications without departing from the spirit and scope of the presentdisclosure. Additionally, the discussion of the preceding embodiments isnot intended to limit the present disclosure. Thus, the presentdisclosure is not intended to be limited to the embodiments shown, butis to be accorded the widest scope consistent with the principles andfeatures disclosed herein.

What is claimed is:
 1. An integrated circuit, comprising: an opticalsource configured to provide an optical signal having a wavelength,wherein the optical source includes: a semiconductor layer including aregion having a top surface and a bottom surface; a material having atop surface and a bottom surface, wherein the bottom surface of thematerial is disposed on the top surface of the region, and wherein thematerial has an optical gain at the wavelength that is larger than thatof the semiconductor layer; a first mirror disposed under the bottomsurface of the region, wherein the first mirror is other than areflector that includes multiple layers with alternating indices ofrefraction; and a second mirror disposed on the top surface of thematerial, wherein the first mirror, the second mirror, the region andthe material define an optical cavity out of a plane of thesemiconductor layer; and an optical waveguide defined in thesemiconductor layer.
 2. The integrated circuit of claim 1, furthercomprising a diffraction grating defined in the region, wherein thediffraction grating is configured to optically couple the optical signalin the plane of the semiconductor layer to the optical waveguide.
 3. Theintegrated circuit of claim 13, wherein the diffraction grating includesan electro-optic material configured to electrically tune the wavelengthof the optical source.
 4. The integrated circuit of claim 1, furthercomprising intra-optical-cavity electrical contacts configured toconduct charge carriers that provide a current out of the plane of thesemiconductor layer in the optical source.
 5. The integrated circuit ofclaim 1, further comprising a layer of another material between the topsurface of the region and the bottom surface of the material, wherein,during operation of the optical source, the other material restrictscurrent out of the plane of the semiconductor layer from thesemiconductor layer to the material.
 6. A system, comprising: aprocessor; a memory storing a program module that is configured to beexecuted by the processor; and an integrated circuit, wherein theintegrated circuit includes: an optical source configured to provide anoptical signal having a wavelength, wherein the optical source includes:a semiconductor layer including a region having a top surface and abottom surface; a material having a top surface and a bottom surface,wherein the bottom surface of the material is disposed on the topsurface of the region, and wherein the material has an optical gain atthe wavelength that is larger than that of the semiconductor layer; afirst mirror disposed under the bottom surface of the region, whereinthe first mirror is other than a reflector that includes multiple layerswith alternating indices of refraction; and a second mirror disposed onthe top surface of the material, wherein the first mirror, the secondmirror, the region and the material define an optical cavity out of aplane of the semiconductor layer; and an optical waveguide defined inthe semiconductor layer.
 7. The system of claim 6, further comprising adiffraction grating defined in the region, wherein the diffractiongrating is configured to optically couple the optical signal in theplane of the semiconductor layer to the optical waveguide.
 8. The systemof claim 7, wherein the diffraction grating includes an electro-opticmaterial configured to electrically tune the wavelength of the opticalsource.
 9. The integrated circuit of claim 6, further comprisingintra-optical-cavity electrical contacts configured to conduct chargecarriers that provide a current out of the plane of the semiconductorlayer in the optical source.
 10. The integrated circuit of claim 6,further comprising a layer of another material between the top surfaceof the region and the bottom surface of the material, wherein, duringoperation of the optical source, the other material restricts currentout of the plane of the semiconductor layer from the semiconductor layerto the material.
 11. A method for providing an optical signal having awavelength, the method comprising: injecting charge carriers into anoptical source in an integrated circuit, wherein the optical sourceincludes an optical cavity out of a plane of a semiconductor layer inthe integrated circuit, and wherein the optical cavity includes: aregion in the semiconductor layer, a material disposed on a top surfaceof the region having an optical gain at the wavelength that is largerthan that of the semiconductor layer, and mirrors below thesemiconductor layer and above the material, wherein at least one of themirrors is other than a reflector that includes multiple layers withalternating indices of refraction; and optically coupling the opticalsignal produced in the optical source to an optical waveguide defined inthe semiconductor layer.